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Low-Noise Low-Power Design for Phase-Locked Loops formatIsbn:Hardcover - 9783319121994 Technische und rechtliche Rahmenbedingungen67

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Technische und rechtliche Rahmenbedingungen67

Umschlaggestaltung von Thomas Schultz-Overhage unter Verwendung des Bildes: Heinrich Wilhelm Trübner

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Low-Noise Low-Power Design for Phase-Locked Loops formatIsbn:Hardcover - 9783319121994 Technische und rechtliche Rahmenbedingungen67This book introduces low noise and low power design techniques for phase locked loops and their building blocks. It summarizes the noise reduction techniques for fractional N PLL design and introduces a novel capacitive quadrature coupling technique for multi phase signal generation. The capacitive coupling technique has been validated through silicon implementation and can provide low phase noise and accurate I Q phase matching, with low power

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